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I don't think that the f2h_sdram interface supports queuing up multiple burst transfers.
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In simulation the Avalon-MM BFM did swallow four read requests before the first burst of read data was returned. In the real system it's sometimes hard to tell (for me anyway) what Qsys injects between entities on the Avalon interconnect. I actually have two mSGDMAs, one for each direction, and they share the f2h_sdram port.
I'm going to have to invest some time into fully understanding what was happening in the hardware before I open a SR on this.
Honored Contributor
