Forum Discussion
Model sim error - fPLL
- 4 years ago
Hi,
Since you are using Quartus Prime Pro edition, you will need to edit your .do file before you simulate your project. From your .do file you are missing a lot of commands:
- Compile all design and testbench files in your project. "vlog -vlog01compat -work work ../<design and testbench files>"
- This is to set the top-level simulation or testbench module/entity name. "set TOP_LEVEL_NAME <simulation top>"
- Call command to elaborate your design and testbench. "elab"
- To run the simulation. "run -a"
You can refer to section 1.4 of this document to understand better: https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug-20093.pdf#page=6
You also need to save your file as wojtek.do instead of wojtek.tcl.
Best regards,
Nurina
Hi,
Since you are using Quartus Prime Pro edition, you will need to edit your .do file before you simulate your project. From your .do file you are missing a lot of commands:
- Compile all design and testbench files in your project. "vlog -vlog01compat -work work ../<design and testbench files>"
- This is to set the top-level simulation or testbench module/entity name. "set TOP_LEVEL_NAME <simulation top>"
- Call command to elaborate your design and testbench. "elab"
- To run the simulation. "run -a"
You can refer to section 1.4 of this document to understand better: https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug-20093.pdf#page=6
You also need to save your file as wojtek.do instead of wojtek.tcl.
Best regards,
Nurina
- Nurina4 years ago
Regular Contributor
Hi,
Since your question has been addressed, I now transition this thread to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.
Regards,
Nurina
P/S: If you like my comment, feel free to give Kudos. If my comment solved your problem, feel free to accept my comment as solution!