Missing MDIO Module in Triple-Speed Ethernet IP for Agilex-5 in Quartus 24.3.1
Hello,
In Quartus 24.3.1, when selecting an Agilex-5 FPGA (A5ED065BB32AE5SR0) for the Triple-Speed Ethernet Intel FPGA IP, we noticed an issue with the MDIO Module availability.
In the "Core Configurations" tab, when choosing "10/100/1000Mb Ethernet MAC with 1000BASE-X/SGMII 2xTBI PCS" as the Core variation, the "MDIO Module" section is missing from the "MAC Options" tab. However, for other core variations ("10/100/1000Mb Ethernet MAC", "10/100/1000Mb Ethernet MAC with 1000BASE-X/SGMII PCS", "1000Mb Small MAC", and "10/100Mb Small MAC"), the "MDIO Module" section appears as expected.
Could you please clarify how we can access the MDIO port (MDC/MDIO) of an Ethernet PHY when using the "10/100/1000Mb Ethernet MAC with 1000BASE-X/SGMII 2xTBI PCS" configuration?
For reference, we don't face this issue if we choose an Agilex-7 FPGA.
Thank you for your support!