Forum Discussion
fa_fpga_enthusiast
Occasional Contributor
Occasional ContributorMissing MDIO Module in Triple-Speed Ethernet IP for Agilex-5 in Quartus 24.3.1
Hello, In Quartus 24.3.1, when selecting an Agilex-5 FPGA (A5ED065BB32AE5SR0) for the Triple-Speed Ethernet Intel FPGA IP, we noticed an issue with the MDIO Module availability. In the "Core Config...
fa_fpga_enthusiastOccasional Contributor
Occasional ContributorHello,
This issue is blocking our progress. Could you please provide a solution?
We need to program the PHY using a TSE IP core that utilizes a GTS transceiver in the PCS layer. However, we have not found an MDIO module in the corresponding TSE configuration for Agilex-5 FPGAs.
We look forward to your response.
Thanks!
