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Altera_Forum
Honored Contributor
9 years agoThe QSYS SPI IP Core is located in
/16.1/ip/altera/sopc_builder_ip/altera_avalon_spi/ /16.0/ip/altera/sopc_builder_ip/altera_avalon_spi/ /15.1/ip/altera/sopc_builder_ip/altera_avalon_spi/ The IP is in "europa" language, after QSYS has build the system you get the configured IP in vhdl/verilog in the soc/synthesis/submodules folder. The I2C component is located in /16.1/ip/altera/altera_avalon_i2c/ as verilog source. No need to purchase these IPs external ...