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Altera_Forum
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9 years ago

MII TSE Deisgn

Hello, i have a few problems with my TSE design. I want to use MII between the MAC and PHY (DP83848C), which is supported by the IP-Core. I have successfully set up a communication over RGMII...
Altera_Forum's avatar
Altera_Forum
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9 years ago

Hello Jens,

thanks for your reply. I am not sure if I have a clock problem or an initialization problem (in C Code). I generate a 25 MHz clock with the FPGA for the PHY and I don't need a 125 MHz clock because I only use a 100Mbit PHY on the DE0/Nano. Are you using the Iniche TCP Stack or are you initialize the TSE by yourself?

Nobody here, who hast a working setup with a DP83848C PHY?

regards,

Donni