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Altera_Forum
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9 years ago

MII TSE Deisgn

Hello, i have a few problems with my TSE design. I want to use MII between the MAC and PHY (DP83848C), which is supported by the IP-Core. I have successfully set up a communication over RGMII...
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Altera_Forum
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9 years ago

Hi Donni,

we use the TSE with a Marvell 88E1111 Phy. When changing from GMII/RGMII to MII I use a clock mux for the tx_clk. In case of 100MBit the Phy provides a 25 MHz clock. In 1000MBit mode the tx_clk (125 MHz) is generated in the FPGA.

May be you have to consider this for the Phy you using?

regards

Jens