MAX10 Dual port RAM compiler - memory not working in silicon

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Did you write code to do this or are you using something from the IP Catalog? If it's code, post it here so we can see what you are trying to do.

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The reason why I asked if someone managed to work with a DUAL port ram instantiation in MAX10DA: for me that would assure it's me to dig better. If noone did, I think there is an issue with compiler (same code worked for a similar grade in Xilinx, apart from RAM IP).

--> Please note that I had to update IP for memories (red flag) ...

Anyhow answer to your question is:

--> I use IP Catalog, RAM2p, please find it in attach.

Kind regards,

Federico