Forum Discussion
Hi,
Amay here agiain I had an issue for logging in thus using different login ID thats ok , My main concern is that when exactly Intel is planning to launch example design for JTAG Security for MAX 10 FPGA Board , I guess MAX 10 FPGA seems to be not launched this year although quartus also has too many bugs which not solved or taken care by intel in new updates even PLL for MAX 10 FPGA output is not getting generated even if testbench is generated by tool itself and it an Global issue when i checked on multiple sites.
Please tell the exactly when intel is planning to drop example design for JTAG security , as you are suggesting to wait for new release as if MAX 10 FPGA is launched this year this seems to be Intel is list bother to take care or properly update quartus for best use , we as users understand that boards are not that costly that does not mean Intel should neglect this issues we face.
Till date some Megawizard without doing full screen does not take configuration also leading to quartus crash this was notified by Multiple users from quartus 15 this issue was seen till date the latest quartus has that issue what are the Intel Employee are working GOD KNOWS Franckly speaking if i continue to write one by one issues in quartus i may need a whole year , we as user are not working to find quartus Bugs we need FPGA to run our project for certain application.
Sometimes i feel Intel Employee take all FPGA Users for granted we are not getting paid to find Quartus bugs cuz of you irresponsibility we face issue and unnecessary lose time.
MY MAIN CONCERN IS JTAG SECURITY FOR MAX 10 I WANT EXACT DATE WHEN INTEL WILL LAUNCH EXAMPLE DESIGN FOR SAME DO NOT GIVE ME UNNECESSARY LINKS.
Regards,
AMAY