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Altera_Forum's avatar
Altera_Forum
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8 years ago

Max 10 ADC simulation problem

I am generating an ADC core only, and I am trying to get the simulation in modelSim using the gui. I generated the ADC in verilog, and I added all the support files in the submodules dir. It compil...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
8 years ago

Try using the auto-generated script for setting up ADC simulation

It is generated from Qsys under directory

<myip>/simulation/mentor/msim_setup.tcl

Follow steps as below.

1. Open Modelsim Navigate to location of scripts.

2. do msim_setup.tcl

3. ld_debug

For further reading.

https://www.altera.com/content/dam/altera-www/global/en_us/pdfs/literature/ug/ug_intro_to_megafunctions.pdf

Topic 1.6 Simulating Intel FPGA IP Cores

Best Regards,

arslanusman2003

(This message was posted on behalf of Intel Corporation)