Forum Discussion
@jozephka99 Thanks for trying out my code. I also already tried all options you mentioned there, without any success. You're right, I do not check for the IDLE state of the IP core. However, when I disable the write protect and then put the sector erase, I do see the BUSY state and after a (very) short while, I see the ERASE SUCCESS bit. This would assume the core has accepted the command and thinks it executed successfully?
I can erase sectors with the programmer, so the issue you're describing regarding the programmer, I do not have.
I think I figured out the signal tap, and it showed me the same signals as both the simulation as the ones I route to my LEDs. So it does set "BUSY" and after a (very) short while it sets the "ERASE SUCCESS" bit. Nothing is cleared, however.
To be sure, I'll re-do the signal tap in several configurations later this week to make sure the signals I read out are correct.
Reading the manual over and over, and reading the comments here in the thread, I'm more and more convinced my VHDL code is correct. (Or at least is implementing the necessary steps). So that makes me wonder if it is the development board that is not letting me erase the CFM. So I'll see if somewhere another board is in stock and I can try that one. Or are there some settings that are not mentioned anywhere that must also be set/altered?
In the mean time, any other tips or steps I can try in order to get the CFM erased? Is manually writing 0's to each possible address in the CFM address range in option, to "fake" an erase? (although that will probably take a long time).