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Altera_Forum
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14 years ago

Local Ready of Stratix III is de asserted

We are using Altera's external memory controller to interface on Stratix with DDR3. The controller on stratix interfaces with Altera PHY IP on one end (which in turn interfaces with DDR3 ) and our ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

I tried to contact altera but didn't get much help. I had to alter my design to not stress cmd fifo too much and though it compromised what we wanted to achieve, it worked. Local ready gets de asserted when cmd fifo fills up, so I reduced the speed of transfer and made sure it doesn't reach there that often. That is the only suggestion I can give you right now.

Regards,

Sandeep Dattaprasad.