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Altera_Forum
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8 years ago

Issue with 245 Fifo sync mode

Dear All, I am actually working on a communication chain between a FPGA and a FT2232H chip. So, the goal is to send a file from PC to FPGA, store it in a FIFO memory and then receive the se...
Altera_Forum's avatar
Altera_Forum
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8 years ago

The "poor synchronization" was on the part of the FT2232 chip/driver, since it supplies RXF, TXF and the clock. These signals are supposed to be synchronous but they were not. As I mentioned, the Windows driver worked fine, the Linux driver showed the glitch.