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Altera_Forum
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8 years ago

Issue with 245 Fifo sync mode

Dear All, I am actually working on a communication chain between a FPGA and a FT2232H chip. So, the goal is to send a file from PC to FPGA, store it in a FIFO memory and then receive the se...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
8 years ago

OK, I once (years ago) had a problem with the Linux driver for this part. I've successfully used the part with Win7-46bit. Nevertheless one thing you could try is monitoring, RXF#, TXF#, RD#, WR# with a high speed scope for glitches. This is not an easy measurement as the glitch, if one exists, will be very low duty cycle.