Is the channel indicator byte (0x7C) in the SPI IP Core guaranteed?

I have implemented the SPI to Avalon-MM IP core in my MAX10 design. While running stress tests on the data transfer between a processor and the MAX10, there is a very rare situation where the channel indicator byte does not appear in the returned packet.

E.g. I am expecting the following returned packet from the MAX10 via the SPI interface:

7C 00 7A 80 00 00 7B 04

(with all preceding and succeeding idle [0x4A] characters removed, and the channel indicator is shown in bold).

In rare circumstances, I will receive an idle character instead of the channel indicator:

4A 00 7A 80 00 00 7B 04

Note that the channel number is still present, but the channel indicator character is not.

I see no other strange or unexpected packets or bytes. Is this behaviour expected? Is the channel indicator character not guaranteed?

Thank you in advance.