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SSmit7's avatar
SSmit7
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6 years ago

Is the channel indicator byte (0x7C) in the SPI IP Core guaranteed?

I have implemented the SPI to Avalon-MM IP core in my MAX10 design. While running stress tests on the data transfer between a processor and the MAX10, there is a very rare situation where the channel...
Rahul_S_Intel1's avatar
Rahul_S_Intel1
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6 years ago

Hi Ssmit,

Sorry I could not able to provide a solution for the above , with your permission can i close the tread

SSmit7's avatar
SSmit7
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6 years ago
Hi Rahul You can close the thread. Regards Stuart