Forum Discussion
New ContributorIP not getting added in the project
Lots of training available on HBM that includes the design and integration flow:
Put "hbm" in the search field here for documentation:
https://www.intel.com/content/www/us/en/programmable/documentation/lit-ug.html
New ContributorHow do I integrate this IP into a project and how do I test it (an example design)? Is there any user manual available for that? These are some of the details of the project
set_global_assignment -name LAST_QUARTUS_VERSION "20.1.0 Pro Edition"
set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
set_global_assignment -name MAX_CORE_JUNCTION_TEMP 100
set_global_assignment -name DEVICE 1SM21BHN1F53E1VG
set_global_assignment -name FAMILY "Stratix 10"
set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 256
set_global_assignment -name EDA_SIMULATION_TOOL "ModelSim-Altera (Verilog)"
set_global_assignment -name EDA_OUTPUT_DATA_FORMAT "VERILOG HDL" -section_id eda_simulation
Super ContributorLots of training available on HBM that includes the design and integration flow:
Put "hbm" in the search field here for documentation:
https://www.intel.com/content/www/us/en/programmable/documentation/lit-ug.html
