Forum Discussion

TSUGI's avatar
TSUGI
Icon for New Contributor rankNew Contributor
6 months ago
Solved

IO Standard for GTS Transceiver REFCLK

Hi, We use on the Agilex 5 and 3 Transceivers with AC coupling. Agilex 5 requires CML, HCSL in Agilex 5 datasheet. However, Agilex 5 Premium kit uses LVDS Clock for some Transceiver REFCLK. Is...
general
Transceiver
  • JonWay_altera's avatar
    JonWay_altera
    6 months ago

    Yes — LVDS can be used as a REFCLK for Agilex 5 (and Agilex 3) transceivers if it is AC‑coupled and its common‑mode voltage/swing are translated into the allowed CML/HCSL input range.

erencuhadar's avatar
erencuhadar
Icon for New Member rankNew Member
4 hours ago

Hello JonWay_altera​,

Datasheet states that REFCLK should be HCLS or CML. You stated LVDS can also be used as REFCLK if it is AC-coupled but in AGILEX 5 FPGA E-SERIES 013B DEVELOPMENT BOARD (the reference design), it is used without AC- coupling:

 

 

 

Besides, I am confused about that, how the voltage swings of LVDS and CML/HCSL be same and why the datasheet does not mention LVDS?