Forum Discussion
GuaBin_N_Intel
Contributor
7 years agoYes, you could do that by instantiating DCFIFO from IP catalog https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_fifo.pdf and wrapping it with avalon-mm interface. You can reference to the HDL generation from the avalon-mm FIFO on how to check the status and control of IP through register mapping.