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Honored ContributorInterfacing Avalon On-Chip Memory Core to a custom Avalon MM Master
Hello, I am trying to implement a custom Avalon MM Master to write into an On-Chip memory. This memory will later be accessed by a PCIe megafunction. My input is a data stream from a camera. As...
Altera_ForumHonored Contributor
Honored ContributorThere had been a master in my ip and have the on-chip memory connected to it, now the on-chip memory slave has two connection, one connects to the master of Pcie core ip and my self-defined ip. The on-chip memory had been mapped to address 0x02000000 in pcie core master, how and what address should the on-chip memory map to my ip? I am very confused about this.
