Intel FPGA IP Evaluation Mode Issue

Question

Hi,
I'm trying to evaluate various IP cores (NCO, FFT, TSE, NIOS II/f). 
However, I'm only ever able to get simulation only mode from them. The error message when doing analysis and synthesis is:
Warning(18390): Intel FPGA IP Evaluation Mode (Simulation-Only) feature is turned on for all cores in the design Warning(18394): Some cores in this design do not support the Intel FPGA IP Evaluation Mode feature Warning(18395): "FFT/IFFT" does not support the Intel FPGA IP Evaluation Mode feature 
I get the same errors for the other IP. 
I am using Quartus Pro 20.1. The device is a Cyclone 10 GX: 10CX220YF780E5GIntel FPGA IP Evaluation Mode is set to Enable (disabling this does not fix)Creating a new project does not fix the issue either. 
In previous versions of Quartus I have been able to get the Triple Speed Ethernet and the NIOS II/f cores to evaluate in Time Limited SOF files. I am trying to do the same now.

syafieqs · Answer

Hi David,
The error is due to you have no license for that core to evaluate. You can request a temporary 60-days evaluation license. Kindly contact your local sales representative or distributor. https://www.intel.com/content/www/us/en/partner/where-to-buy/overview.html 
Thanks,
Regards

dlync7 · Answer

Has this changed recently?
I used to be able to generate time limited .SOF files without needing any license with the Intel FPGA IP Evaluation Mode turned on. I was definitely using the NIOS II/f and Triple Speed Ethernet Core in a tethered evaluation mode either in Quartus Pro 18 or 19

dlync7 · Answer

Hi,
Is there any update on this?Going forward is the only way to generate time limited SOF files is with 60 day evaluation licenses by requesting from distributers? 
https://www.intel.com/content/www/us/en/programmable/support/support-resources/download/licensing/q-and-a.html#a_01 This FAQ still says that a license is not required to evaluate Intel IP and AN320 has not been updated since Quartus 17.1

syafieqs · Answer

Hi Dave,The link I gave is an alternate method in order for you to evaluate the IP and yes Intel FPGA IP Evaluation feature still support generating time limited SOF files. Is there any possibility you could the steps and design file for me to replicate the issue as this might be a bug for recent QP Pro releases(sent it via private message if it). Also just make sure to follow up with the distributor for the temporary 60-days evaluation license, surely there it is gonna take a while.Cheers,Syafieq

dlync7 · Answer

Hi,
When I generate an IP core to evaluate (FFT for example), I use these settings

All I do after that is add the .ip file to the project. Once it is added I get this message:

I have gone through every setting tab and made sure all the settings are the same as a blank project (signaltap off, logic analyzer off, simulation tool none). I have also tried deleting any qdb folders, the tmp-clearbox folder, the .qdf file and any .bak files related to settings.
If I don't have that fft ip file added I can generate regular .sof files fine and I have other IP that I have already purchased included in the project.

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Intel FPGA IP Evaluation Mode Issue

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