Forum Discussion

jsondergaard's avatar
jsondergaard
Icon for New Contributor rankNew Contributor
2 years ago
Solved

Intel FPGA Avalon I2C (Host) Core

Does anyone have an example or tutorial on how to use this core on an SoC? I have had success with the Cyclone V using other cores and writing to their registers from the HPS via the Avalon mm to suc...
Pcie
  • jsondergaard's avatar
    jsondergaard
    2 years ago

    The register addresses in the datasheet actually need to be multiplied by four. Everything is working just fine now.

jsondergaard's avatar
jsondergaard
Icon for New Contributor rankNew Contributor
2 years ago

Eberlazare,

I appreciate the suggestion. This appears to be a different core than the "Intel FPGA Avalon I2C (Host) Core." It is also meant for a MAX 10 dev kit, so the hardware isn't quite the same. I probably should've mentioned that I am using the DE10-Nano from Terasic. With that said, the general Qsys connections I have on my end are relatively the same.

Thank you,

Jordan

  • jsondergaard's avatar
    jsondergaard
    Icon for New Contributor rankNew Contributor
    2 years ago

    The register addresses in the datasheet actually need to be multiplied by four. Everything is working just fine now.