Altera_Forum
Honored Contributor
17 years agoinput for HDL import
Let say if i have InputAlteraBlockset with the bus type set as fractional integer [4].[4] and connect to the HDL import blockset, is that possible? What input format should the HDL import blockset has in order to be compatible with the fractional input? I have tried both std_logic_vector(7 downto 0) or sfixed(3 downto -4) and it I couldnt the expected result.
any suggestion/advice?? thanks alot!!!