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Altera_Forum's avatar
Altera_Forum
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14 years ago

implement ram with logic blocks

Hi all! I am designing an Avalon-MM interface with a page system: a page register is used as address of a memory and a data register is used to read/write the memory. The memory I instanci...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

Since you said you only need 2 or 3 addresses, I'd build my own component using 2 or 3 48bit register arrays and a simple decoder.

This would involve some coding, but it is likely to ensure a minimal resource implementation.