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Knug's avatar
Knug
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5 years ago

Implement a Remote System Upgrade in FPGA fabric

Hi, I am trying to understand how to implement a Remote System Upgrade in our flow to allow remote upgrade. Currently our MAX V (5M1270) CPLD configures Cyclone V (5CEBA5) FPGA. We program the CP...
YuanLi_S_Intel's avatar
YuanLi_S_Intel
Icon for Regular Contributor rankRegular Contributor
5 years ago

After several understanding from your scenario, I think this is the best way for you. Since you are using PFL IP already, there is no point in using Remote Update IP as it requires AS mode. We can’t have 2 different configuration mode on our FPGA.

So, you can implement you own logic to remotely send the bitstream via JTAG / UART / I2C to the MAX10 and then use the PFL to send to bitstream into the flash.


Knug's avatar
Knug
Icon for Contributor rankContributor
5 years ago

Hi @YuanLi_S_Intel ,

We are using PFL IP (FPP Configuration scheme) but this is within a MAX V and not MAX10 CPLD.

Our current platform supports only MAX V CPLD, as pointed out in one of my previous tickets to you.

MAX10 CPLD on the other hand looks to be having an embedded Flash & a "Nios II Processor / On-chip Memory" RSU Controller but the architecture of MAX V CPLD is different !

Please comment here too.

Regards,

Kevin