Forum Discussion
Knug
Contributor
5 years agoOutstanding important question wrt this ticket :
Q/ Is 'Remote Update Intel IP' compatible with the 'PFL intel IP' ie can the 'Remote Update Intel IP' be used to implement the 'Image update circuitry' block (shown in fig17 of the Parallel Flash Loader Intel FPGA IP User Guide) within the Cyclone V (5CEBA5) FPGA and be then interfaced with the CPLD MAX V (5M1270) internal PFL and still able to use Fast Passive Parallel (FPP) x16 (16bits) configuration scheme ?