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JHaye4's avatar
JHaye4
Icon for Occasional Contributor rankOccasional Contributor
5 years ago

Illegal Connection with GPIO Intel® FPGA IP output buffer.

I am using the GPIO Intel® FPGA IP core to connect a Intel FPGA Avalon I2C (Master) Core to the pins of my FPGA. When I connect the "dout" port of the buffer in bidirectional mode to my core logic ...
JHaye4's avatar
JHaye4
Icon for Occasional Contributor rankOccasional Contributor
5 years ago

Resolved by not being silly and connecting ports correct way round.

JHaye4's avatar
JHaye4
Icon for Occasional Contributor rankOccasional Contributor
5 years ago

Not resolved, still having the same warning. Cannot connect bidirectional IO buffer without generating errors.

  • sstrell's avatar
    sstrell
    Icon for Super Contributor rankSuper Contributor
    5 years ago

    How have you set up your pin assignments in the Pin Planner?