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Altera_Forum
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17 years ago

I2S and FIR Compiler

Hi everyone, I have to design an interpolation filter which will work as a cascade of three filters: 1. Inverse - sinc filter which compensates for droop from CIC filter (interpolation x2...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
17 years ago

In timing simulation, in my opinion, it works:

http://www.fullinstrumentale.neostrada.pl/Altera_mail/Mail_to_Altera/01.png

This i2s_rx takes only 16 bits from one channel (when OLRCK is high).

http://www.fullinstrumentale.neostrada.pl/Altera_mail/Mail_to_Altera/02.png

In simulation I feed serial_data_in with random values with f = 64*Fs. Module i2s_rx takes only first 16 bits. Data is synchronized with RMCK/128 = 44100 Hz and then go to filter.

FIR is parametrized with these values:

http://www.fullinstrumentale.neostrada.pl/Altera_mail/014.png

When I program device and feed CS8416 with 16bit, 44100Fs sinus I get very distorted sinus on output of the board. When I change freq of sinus I hear this change in audio but for sure - this isn't working good. Morover, when I change something in input signal (amplitude or frequency) leds on board are flashing (they are not assigned).

Morover I get known warnings about clocks, I have assigned them in that way:

http://www.fullinstrumentale.neostrada.pl/Altera_mail/Mail_to_Altera/05.png