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Honored Contributor
Honored ContributorI2C core issue
Hello. I want to use Wishbone I2C core from OpenCores in my Nios project. Trying to send a byte, i write 0xA2 byte to TxR and set STA and WR bits, the TIP flag asserts high and then never negates ...
Altera_ForumHonored Contributor
Honored ContributorI'm using the OpenCores block with a Nios. The only thing that was required was to combine read and write to make the wb_stb signal and inverting wb_ack as the waitreq.
The problem is more likely that the I2C signals should be tristated when output enable negates or else the core will never see the ack from the slave device.
