How to use the DDR3 SDRAM Controller with UniPHY (and the Avalon interface) SoCKit

Thanks for your reply!

I was mistaken, the addressing of the DDR3 is not 15 bit, this was just the length of one Row. I definitely need the whole 1 GB of the DDR, and I will write my own controller but I want to use the generated interface. So due to the way the Avalon interface works , I have to translate between 32 bit and 128 bit words?! It would be pretty inefficient to read/write single 32 bit addresses of the FPGA's DDR from the ARM, wouldn't it? I can't really tell how 'wasteful' this might be, any idea if using the interface is even feasible for addressing the FPGA's RAM from the ARM.