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hxhaa's avatar
hxhaa
Icon for New Contributor rankNew Contributor
2 years ago
Solved

How to use CXL IP Design Example on DK-DEV-AGI027RBES

I generate design example in quartus 23.3, choosed type2, AGI027RBES and other config default. The project compiled with timing warnning in Timing Analysis, but the sof file is generated in output...
Cxl
  • WZ2's avatar
    WZ2
    2 years ago

    Hi there,

    Firstly, we should make sure the device enter into the user mode.

    Secondly, could you make sure all the switch like the default setting in the user guide.

    If all this you make sure, I will upload a pof file for you and you can try.

    Of course, it is not ruled out that the problem may be caused by the system.

    Best regards,

    WZ


WZ2's avatar
WZ2
Icon for Frequent Contributor rankFrequent Contributor
2 years ago

Hi there,

Firstly, we should make sure the device enter into the user mode.

Secondly, could you make sure all the switch like the default setting in the user guide.

If all this you make sure, I will upload a pof file for you and you can try.

Of course, it is not ruled out that the problem may be caused by the system.

Best regards,

WZ


hxhaa's avatar
hxhaa
Icon for New Contributor rankNew Contributor
2 years ago

Thanks for your reply.

There are some questions need your help.

What is user mode? How to enter into?

The default switch setting for DK-DEV-AGI027RBES switch4 is on/off/off/off in user guide, but it makes the JTAG unknown. I try to program flash at off/off/off/off, and use at on/off/off/off, it can't work. How to set it?

I know it may be caused by the system, but now the D11 LED is off. It means I have some wrong operation for FPGA.

Maybe a pof is needed if these questions are solved but it also can't work.

Best regards,

hxhaa