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fxu001's avatar
fxu001
Icon for Occasional Contributor rankOccasional Contributor
6 years ago

How to program phy device

Hello, I leverage existing Arria 10 phy device in the design. Since original phy reference clock is 125Mhz, now I have to use 150Mhz because clock resource limitation. How do I re-program phy to mee...
Rahul_S_Intel1's avatar
Rahul_S_Intel1
Icon for Frequent Contributor rankFrequent Contributor
6 years ago

Hi Fred,

I am very much afraid the advice on the above case, If I understood your question. The Question is you have is one Clock PHY device ( Not FPGA ) which generates 125 Mhz and the current requirement is for the 150 MHz.

How to program the PHY device ( Not FPGA) ,

if the above is the question , I would recommend to contact to the PHY device vendor. In generic the PHY device vendor have some register setting to change the frequency.

If it is in FPGA , I would recommend you to use PLL to change the frequency.

fxu001's avatar
fxu001
Icon for Occasional Contributor rankOccasional Contributor
6 years ago
Hello RSree I see. I also think from the design view point that transmit and receiver should match earth from frequency point; otherwise, it will mismatch the handshake; however, there is one exception if the bus handshake is aync design. From my experiment, it seems sync design in here, so it seems change the frequency is not good choice for now. Does the phy design by Intel also? if yes, could you ask them, so I can know more to understand intel phy behavior for the later on design? My question is if receiver input clock change from 125 to 150, there is a way to change internal ratio to be 125M drive. As I did a long time ago, the Xilinx FPGA editor can do the process. How about Altera Phy? Thanks, -Fred Thanks, -Fred