How to get the FIFO informations

I suggest you start reading the Altera PCIe user guide: http://www.altera.com/literature/ug/ug_pci_express.pdf

It explains the interfaces available from the PCIe cores. You will have to write a custom component to handle the Avalon-ST or Avalon-MM interface without a Nios.

Using hard core on an ArriaII, you have to use a 64-bit Streaming interface, which means you have to pull apart the TLPs yourself. I recommend getting the mindshare PCIe system architecture book, that explains how TLPs should be generated and controlled.

http://www.mindshare.com/learn/?section=11e3067e0ba2