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Honored Contributor

11 years ago

How to check Gain with ModelSim-ASE (FIR Compiler)

Hello everybody,

I try to FIR Compiler simulation.

I want to know how to calculate Gain from simulation result.

I think that " Gain = 10 log (Vin / Vout)^2 ", but Fir Compiler's input data bit and output data bit is different.

My setting is following.

1. LPF

2. cut off frequency : 1.25MHz

3. input 8bit

4. output 8bit (Full bit is 22bit, and LSB 14bit Truncate)

I made input 3MHz input data, and input data is 100 ~ -100.

I simulation it, but output data is 49 ~ -50.

I want to 0db Gain result, but result is -6db.

This method is different?

If truncate the bit, it effect on the calculation of the gain?

Could you tell me please?

I will attach the project.(ver 13.1)

https://www.alteraforum.com/forum/attachment.php?attachmentid=9261

Thanks for read.

11 Replies

Altera_Forum
Honored Contributor
11 years ago
If you've never designed analog filters before, take a read of this document:

http://www.ovro.caltech.edu/~dwh/carma_board/ad9956_tests.pdf

Look on pages 18 to 26, where I document how I designed a 50MHz low-pass filter. On p25 note how the stop-band rejection of the filter is better than 60dB a little above 50MHz. This signal could be sampled using an ADC clock at around 120MHz, and the aliased energy would be less than the quantization noise floor of the ADC, i.e., the aliased energy would make no difference to the sampled signal.

Your 1.25MHz signal would need to be analog filtered in a similar way before sampling it with an ADC.

Cheers,
Dave