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mifa's avatar
mifa
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6 years ago

How to add Intel IP to Custom IP (hw.tcl)?

I am creating an IP with a bunch of Verilog files. In some of that verilog files I would like to use Intel IPs like ALT_IOBUF, ALTCLKCTRL or a FIFO. If I start the simulation with the generated simu...
mifa's avatar
mifa
Icon for New Contributor rankNew Contributor
6 years ago

Unfortunately, that example you gave me only showed how to add some .v or .sv files.

I need a example for a structure like that:

  • top_file.v
    • file_a.v
    • file_b.v
    • ALTCLKCTRL (what I have to add?)
    • file_c.v
      • file_cc.v
      • Altera DC_FIFO_IP (what I have to add?)

Adding the verilog files is clear, but what to do with the IPs? Is there a way to add .qsys or _hw.tcl?

Workaround ALTCLKCTRL: Fortunately, the synthesis creates the clock switch by itself. However for simulation, I had to make a extra simulation file, because it was not found there.

I think that way is still not best-practice.