Forum Discussion
Altera_Forum
Honored Contributor
17 years ago --- Quote Start --- I am correct that DMA operates on the End Point memory mapped to BAR[0], or is the memory involved in DMA located elsewhere? Also, for individual DWORD read/writes to RC_SLAVE memory, must I set USE_RC_DIRECT_MEM to 1? altpcierd_rc_slave.vhd: USE_EP_MWR := 0;-- Allow EP to issue MemWr to RC on command USE_RC_MWR_MRD := 1; -- Allow RC access to EP MEM thru opcode regs USE_INIT_MEM: INTEGER := 0; USE_RC_DIRECT_MEM: INTEGER := 0;-- Allow RC direct access to EP MEM USE_EP_IO_RDWR:= 0; -- Allow EP to issue IO Rd/Wr to RC on command Thanks for any insights. --- Quote End --- I believe that with USE_RC_DIRECT_MEM set to 1 and RC_SLAVE set to 1, accesses to EP memory mapped to BAR[0] will access the same memory that the DMA accesses. However because the first 64 bytes of the BAR0 space has some special functions, you need to add 64 when trying to access the local memory the DMA sees. IE to access the memory that the DMA accesses at it's local address (DW1 of the descriptor) you need to add 64 when accessing the BAR[0] mapped space.