Forum Discussion
Altera_Forum
Honored Contributor
15 years agoOk, I am now again working on this problem and I did not get it to work. Can you please help me again?!
I followed Kevins advise and I am now trying to access the SDRAM by the addresses. SDRAM_0: 0x000000000 to 0x07fffffff SDRAM_1: 0x080000000 to 0x0ffffffff My selfwritten module is connected to both Rams. I have got a 32Bit address std_logic_vector. How can I now access one time the SDRAM_0 and one time the SDRAM_1? Everytime I try to access I only get the data from SDRAM_0. Is there some kind of trick with this? In my opinion the Address Decode Logic wants to fool me, but I did not find the right key to get it properly working. Thanks for any advise.