How can I connect PCI Express MegaCore to FIFO!

Look in the PCI Express Compiler User Guide for version 7.2. Tables 4-30, 4-31, 4-33, 4-34 describe where the PCI Express TLP header (aka descriptor), which contains the address, is located on the Avalon-ST interface. Tables 4-37 and 4-42 describe the location of the TLP Header on the Descriptor/Data interface. Appendix A briefly shows the TLP Header layout, but you will need to consult the actual PCIe specifications or a PCIe reference book for more detailed definitions of the TLP header fields.