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Altera_Forum's avatar
Altera_Forum
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9 years ago

Hard memory controller IP for Cyclone V

Hello, Could you please point to how to access Hard memory controller (external DDR3) in Cyclone V from FPGA custom logic? Which is the IP core that allows to create generate IP core instance, ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
9 years ago

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Are you saying that despite they write DDR3 I should use DDR2 hard memory controller?

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No, use DDR3 controller.

As I understand you are not planning to use memory modules (board of your provided link uses only one memory chip) so there is no need for write levelling anyway.

Regards,

Geros dienos :)