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Altera_Forum
Honored Contributor
9 years agoHard IP for PCIe gen 3 simulation on Arria 10
I've successfully run simulations of a gen 1 interface, but I am having real troubles doing a gen 3 sim. I'm using the Avalon streaming core for an endpoint application. I've created a testbench sy...
Altera_Forum
Honored Contributor
8 years agoAt first, you can try use the static design examples for simulation that are available in Quartus installation directory.
<install_dir>/ip/altera/altera_pcie/altera_pcie_a10_ed/example_design/a10 The driver is altpcietb_bfm_rp_gen3_x8.sv try the ebfm_barwr_imm procedure which writes up to four bytes of data to an offset from the specified Endpoint BAR. ebfm_barwr_imm(bar_table, bar_num, pcie_offset, imm_data, byte_len, tclass) The ebfm_barrd_wait procedure reads a block of data from the offset of the specified Endpoint BAR and stores it in BFM shared memory. ebfm_barrd_wait(bar_table, bar_num, pcie_offset, lcladdr, byte_len, tclass)