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Farabi
Regular Contributor
2 years agoHello,
Can you refer to this page? link : https://www.intel.com/content/www/us/en/docs/programmable/683271/current/understanding-quad-spi-flash-byte-addressing.html
regards,
Farabi
128 MBit Flash uses 24-bit-wide byte address. AVMM interface has however 22 DW addresses + 4 byte-enable lines to access the flash. A doubleword access at AVMM is translated by GSFI core to 4 consecutive internal byte accesses.
Hello,
Can you refer to this page? link : https://www.intel.com/content/www/us/en/docs/programmable/683271/current/understanding-quad-spi-flash-byte-addressing.html
regards,
Farabi