Forum Discussion
Altera_Forum
Honored Contributor
Honored ContributorGeneral question about DDR2 megafunction IP
Hello, I am new to FPGA design and I need to use the DDR2 Megacore Controller. I read the user guide and other documentation i found but I don't understand everything... I have Altera PC...
Altera_ForumHonored Contributor
Honored ContributorThe two additional address lines used at the RAM are col_adr[1..0], cycled during x4 burst, you also mentioned them. Your calculation is correct.
