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Altera_Forum
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17 years ago

General question about DDR2 megafunction IP

Hello, I am new to FPGA design and I need to use the DDR2 Megacore Controller. I read the user guide and other documentation i found but I don't understand everything... I have Altera PC...
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Altera_Forum
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17 years ago

Thank you franck for your quickly answer.

So, if I understand, I can address all my ram from "000..." to "111..." (23 bits) just like one component. Ok.

Now, i understand. Data lines are 288 bits width and address lines are 23, so 8192 kWords x 288 bits equals 290 Mo. It's good.

But what did you said:

"I also calculated 23 address lines at the controller local bus respectively 25 at the RAM"

Why 25 at the ram?

Thanks for all!

Fabrice.