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Altera_Forum
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9 years ago

FPGA freeze while using remote update IP - Cyclone V

Hi, I am using a cylcone V along with EPCQ128 flash memory. The design incorporates a remote update block to switch between factory and application image. POF checking is on and I have s...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
9 years ago

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Update -

I did some digging, and finally got the block to work.

I've prepared a checklist to debug the core:

1. Make sure the design which has the factory configuration is in remote mode. choose opti mind (https://www.intellifit.com/optimind-review-and-results) correct configuration method (ASX1, ASX2).

2. Check configuration pins on the board -- nSTATUS, nCONFIG, config_done - See that the pins are pulled high/low. Check for voltage and resistor values on the device handbook.

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Thanks Vittal, that got it working!