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ESama's avatar
ESama
Icon for New Contributor rankNew Contributor
4 years ago
Solved

FIR II Placement

Hello

I would like to use a FIR II decimation filter in a Cyclone 10GX target. During the fitter placement process, I get the following message: "Cannot place the following 19 DSP cells -- a legal placement which satisfies all the DSP requirements could not be found."

Is there anything missing?

The FIR parameters are:

- Decimation factor: 16

-Clock rate: 75 MHz

- Input Sample rate : 1200 MSPS

- Input width: 16 bits

There is no other IP in my design requiring some DSP blocks.

I m using a Cyclone 10CX220YF780E5G and a free quartus prime pro edition.

Thank you for your help

Best regards

Etienne

  • ESama's avatar
    ESama
    4 years ago

    Hi

    Thank you for your reply.

    I therefore built a simple project to mimic the FIR decimation filter alone and every thing is OK. So, the PB seems to come from some other parts of my project.

    Best regards

4 Replies

  • CheepinC_altera's avatar
    CheepinC_altera
    Icon for Regular Contributor rankRegular Contributor
    4 years ago

    Hi,


    As I understand it, you observe some Fitter problem with your design with only 1 FIR IP instance. As I checked the part that you have selected, there are quite a number of DSP blocks. I have created a simple test design in Q20.2Pro with 1 FIR instance mimic your configuration and seems to be able to fit. My simple design uses 19 DSP blocks.


    To facilitate further debugging, would you mind to share with me a simple test design of yours so that I could perform replication on my side.


    Please let me know if there is any concern. Thank you.



    Best regards,

    Chee Pin


  • ESama's avatar
    ESama
    Icon for New Contributor rankNew Contributor
    4 years ago

    Hi

    Thank you for your reply.

    I therefore built a simple project to mimic the FIR decimation filter alone and every thing is OK. So, the PB seems to come from some other parts of my project.

    Best regards

  • CheepinC_altera's avatar
    CheepinC_altera
    Icon for Regular Contributor rankRegular Contributor
    4 years ago

    Hi,


    Thanks for your update that with simple FIR project, there is no similar error encountered. You may add module by module and run compilation to help narrowing down which specific module that lead to the error.


    Please let me know if there is any concern. Thank you.


  • CheepinC_altera's avatar
    CheepinC_altera
    Icon for Regular Contributor rankRegular Contributor
    4 years ago

    I believe the initial inquiry has been addressed. This thread will be transitioned to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.