Here is an example that I did a while back when I was playing with the FFT/IFFT core. It was built with DSP Builder 6.1. Also it incorporates the unity gain formula highlighted in the Block floating point Application note. One thing it highlights is the possibility of using the embedded MATLAB function to generate test vectors for your DSP Builder/ Simulink setup. Hope this helps.

Hi, I'm trying to repeat your FFT scaling Matlab testbench simulation using DSP Builder and FFT megacore version 7.0 and I think the simulation results are not quite right. I'm attaching the display results of the initial_real/initial_imag and final_real/final_imag. If you can give some idea how to fix the problems, it will be helpful. Thanks, Regards, wimax

Hi, Wimax, I don't believe there are any huge changes between version 6.1 and 7.0 (I believe the only difference is the Cyclone III support). It seems like you changed the design a bit (your input sine wave merely has amplitude of 5. Mine uses the full 16 bit resolution. The core only takes full precision value (it does not know how to handle decimal points). Therefore, if you are not putting in the full precision, then you might get some error. Also are you using the same 1024 streaming FFT? If not, you might need to change the input module embedded matlab block. That way the proper sop and eop signals would be generated. Hope this helps. - WZ

Hi, FYI, I'm using the full resolution of 18 bits for data and twiddle on 1024 streaming FFT. I've updated and attached the new image with autoscale and it looks better now. The problem is the final_imag is not zero as the initial_imag. Do you have any idea what is the problem? Regards, Shaiful

Hi, Sorry for the delay in response. I just saw this posting today... It shouldn't be a big deal... probably some sort of rounding error due to fixed point representation... If you look at it... the dynamic range for image out is merely from 4 to -4. But the dynamic range for your real out is from 10^4 to -10^4ish area... therefore it's practically insignificant and I would not worry about it... Hope this helps...

Hi wronghorizon, Thanks, I did manage to solve the non-zero problem by using higher resolution. Now I'm trying to introduce complex multiplier in between the FFT and IFFT in order to control the output by modifying the original DSP BUilder FFT/IFFT Unity Gain Example (using multiply add module). Since I'm using a constant muliplier of 1 and 0 for each of the complex multiplier respectively, I'm expecting the same result as through, i.e. non-zero real and zero imag output as before. The problem now, I'm not getting the same result and both output are of the same magnitude with funny shapes. Do you have any idea? I'm attaching the new simulation together with this entry. Regards, wimax

FFT/IFFT Unity Gain Example | Altera Community

12 Replies

Altera_Forum
Honored Contributor
17 years ago
Hi,

Strange, using the latest Quartus 8.1 I've got correct result by using the original FFT/IFFT unity gain example without introducing any delay.

Since I'm interested in frequency doamin processing I've purposely added unit delay between FFT source real/imag and IFFT sink real/imag. The result is not very encouraging since don't have the correct result anymore. I've verified this with a RAM module in place of the unit delay and it gives the same error result. Is it something to do with the control flag between FFT and IFFT core? If that the case how can I delay them appropriately to handle the extra processing in the frequency domain?

I'm attaching the screen shot of the incorrect result.

Regards,

Wimax
Altera_Forum
Honored Contributor
17 years ago
If you want to add a delay between the two stages, then you have to make sure to delay all the control signals as well (not just the real and imag data).... judging from your diagram, I suspect that's what you are doing...

I have updated the 8.0 design to 8.1 and also included unit delay between the two stages as well... Hope this helps...
FFT_IFFT_UnityGain(81).zip20 KB

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FFT/IFFT Unity Gain Example

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