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Altera_Forum
Honored Contributor
13 years agoIn any case your fpga fft result must match fft matlab
But if you compare to Matlab fft you must also quantise the input and output in matlab in order to model FPGA. your vector is too short to judge. Moreover your cycles are not complete. The vector is better to have full sine cycles. So the spikes may be due to truncation. You don't need to think of real ADC signal. The same rule applies to any vector that is equivalent to what ADC will give you