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Altera_Forum
Honored Contributor
14 years agoFFT Megacore V11.1 problem
Hi all, I am using Terasic's DE2-70 dev board and I am building a windowed FFT processor (8192 points each, 16 non-overlapping windows) using Quartus II and Modelsim-Altera. The megacore uses b...
Altera_Forum
Honored Contributor
14 years agoyes I am now almost sure that the FFT core cannot operate at 100 MHz. It makes sense that the very low dynamic range inputs would work fine at that frequency. this is because the ripple time of carries in adders and multipliers would make the settling time for combinational logic higher and would require a slower clock. For small numbers, the ripple propagation is short so it worked. Do you think that makes sense ? clipping did not happen for sure because I read the data from ram and plot it in matlab and it is perfect !