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Altera_Forum
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14 years ago

FFT Megacore V11.1 problem

Hi all, I am using Terasic's DE2-70 dev board and I am building a windowed FFT processor (8192 points each, 16 non-overlapping windows) using Quartus II and Modelsim-Altera. The megacore uses b...
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Altera_Forum
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14 years ago

So is't timing issue, I assume you passed timing but are your sure about ssram interface timing?

Regarding clocks, you use clock control block or may be just one clock with different enable rates.