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Altera_Forum
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14 years ago

FFT Megacore V11.1 problem

Hi all, I am using Terasic's DE2-70 dev board and I am building a windowed FFT processor (8192 points each, 16 non-overlapping windows) using Quartus II and Modelsim-Altera. The megacore uses b...
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Altera_Forum
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14 years ago

You should clock your data into fft with its own sampling rate i.e. 25MHz.

But I still have doubts. Clocking sinewaveform of Fs 25MHz from sdram using 100MHz will not produce harmonics but will just shift your 3KHz to 12 KHz.

There might be something else wrong in your clocking.

Also make sure that your ADC data is not offset binary which needs inverting the sign bit.